IDCHIP.EXE Identifies the Cirrus Logic Video Chip
CL-GD542x Data Book (alt)
CL-GD542x Technical Reference Manual
GD542x IREF Circuit Comparison (and fix)
Planars and Adapters with GD542x
GD542x Comparison
Compatible SOJ DRAM Chips
SOJ DRAM Pinout
Planars and Adapters with GD542x
* Video BIOS and system firmware (POST/BIOS) stored in the same image/chip.
GD542x Comparison
Complete list of features HERE.
Feature |
GD5426 |
GD5428 |
GD5429 |
Performance |
BitBLT Engine |
Yes |
Enhanced |
MM I/O |
Zero-wait-state operation |
Yes |
Yes |
Yes |
Maximum display memory |
2 MB |
2 MB |
2 MB |
Display memory interface |
32-bit |
32-bit |
32-bit |
Max. dot clock frequency |
80 MHz |
80 MHz |
86 MHz |
Max. MCLK frequency |
50 MHz |
50 MHz |
60 MHz |
General |
8-bit gray and 3-3-2 RGB DAC modes |
No |
Yes |
Yes |
VESA VAFC base support (for video overlay) |
No |
No |
Yes |
Screen resolution and colors |
640 x 480 |
up to 16M |
up to 16M |
up to 16M |
800 x 600 |
up to 64K |
up to 64K |
up to 64K |
1024 x 768 (interlaced) |
up to 256 |
up to 64K |
up to 64K |
1024 x 768 (non-interlaced) |
up to 256 |
up to 256 |
up to 256 |
1280 x 1024 (interlaced) |
up to 256 |
up to 256 |
up to 256 |
Compatible SOJ DRAM Chips (from Peter; edited)
The memory modules should be 70 ns or faster. If you are adding extra video
memory on the adapter, use chips with the same or lower access time as the
existing modules.
The same chips are used on the PC750, PC720 (Japanese) IBM planars and Reply
PowerBoards.
SOJ DRAM Pinout
Pinout of the 256Kx16 DRAM 40-pin SOJ chips.
/--------------+
Vcc --+o 1 40 +-- Vss
DQ1 --+ 2 39 +-- DQ16
DQ2 --+ 3 38 +-- DQ15
DQ3 --+ 4 37 +-- DQ14
DQ4 --+ 5 36 +-- DQ13
Vcc --+ 6 35 +-- Vss
DQ5 --+ 7 34 +-- DQ12
DQ6 --+ 8 33 +-- DQ11
DQ7 --+ 9 32 +-- DQ10
DQ8 --+ 10 31 +-- DQ9
nc --+ 11 30 +-- nc
nc --+ 12 29 +-- CASL#
WE# --+ 13 28 +-- CASH#
RAS# --+ 14 27 +-- OE#
nc --+ 15 26 +-- A8
A0 --+ 16 25 +-- A7
A1 --+ 17 24 +-- A6
A2 --+ 18 23 +-- A5
A3 --+ 19 22 +-- A4
Vcc --+ 20 21 +-- Vss
+--------------+
Vcc = +5V DC, Vss = GND
Signal marked with # are active LOW.
Source: Micron Technology Inc. Datasheet, ASCII Art by PHW.
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