Narrow IBM SCSI

"Trible", "Spock", and derivatives

Introduction
Block Diagram
Components
   System Interface/Bus Master DMA Controller
   Data Flow Controller (uncached only)
   Cache and Data Flow Controller (cached only)
   Disk Cache (cached only)
   SCSI Bus Controller
   Adapter Microprocessor
   Adapter BIOS and POST
Implementations
Sources


Introduction

The IBM SCSI subsystem serves as the interface between the Micro Channel Architecture (MCA) bus and devices using Small Computer System Interface (SCSI). The subsystem supports:

  • Abroad range of internal and external SCSI devices.
  • Up to seven SCSI physical devices. Each physical device can support eight logical devices.
  • Overlapped command processing for up to 15 devices.
  • Devices compatible with SCSI Common Command Set.
  • A data transfer rate of up to 5 MB/s from the adapter to SCSI devices.
  • A data transfer rate of up to 8.3 MB/s (uncached) or 16.6 MB/s (cached) to the MCA host (burst).
  • A 16-bit (uncached) or 16/32-bit automatically configurable data bus (cached).
  • A 24/32-bit automatically configurable address bus.

The adapter also serves as a bus master (intelligent bus controller).


Block Diagram

   * Cached adapters only


Components

System Interface/Bus Master DMA Controller

The system interface/bus master DMA controller provides the command and interrupt registers. These registers receive commands from the system and interrupt the system when a command is completed. The transfer of data between the adapter and the system is controlled through bus master DMA.

16-bit adapters w/o cache support data transfers up to 8.3 MB/s (burst).
32-bit adapters w/ cache support data transfers up to 16.6 MB/s (burst).

All implementations use the 33F6715 SCSI MCA iface/BM DMA controller.

Data Flow Controller (uncached only)

The data flow controller manages the flow of parallel data between the SCSI bus and the system. The controller allows concurrent data transfers between the SCSI bus and the Micro Channel.

The bus-steering and data-flow logic allows either byte or word transfers to the system, and performs these transfers in the burst mode.

All uncached implementations use the 33F6910 SCSI Data flow controller.

Cache and Data Flow Controller (cached only)

This is a more advanced version of the Data Flow Controller above.

The cache and data flow controller manages the flow of parallel data between the cache, the SCSI bus, and the system. The controller allows concurrent data transfers between the cache and the following:

  • The SCSI bus
  • The Micro Channel connectors
  • The adapter microprocessor random access memory (RAM).

The bus-steering and data-flow logic allows either byte, word, or doubleword transfers to the system, and performs these transfers in the burst mode.

All cached implementations use the 15F6903 SCSI Cache/data flow controller.

Disk Cache (cached only)

The disk cache keeps frequently-used SCSI device data available for immediate transfer to the system. The disk cache also holds data until it can be transferred to the system by the system interface/bus master DMA controller. The disk cache is organized as 256K by 18 bits, including two parity bits, for a total of 512 KB*.

The cache memory can be implemented in a number of ways:

  • 2x 30-pin 256Kx9 (or 1Mx9*) parity SIMM
  • 4x 256Kx4, 2x 256Kx1 DRAM
  • 6x 256Kx4 DRAM (two devices used as 256Kx1 for parity?)
  • 1x 256Kx18 DRAM

* Cached adapters with SIMM sockets ("Spock", "Spock Prime" and 7568 DASD) unofficially support a 1M by 18 bits configuration for a total of 2 MB of cache memory.

SCSI Bus Controller

The SCSI bus controller transmits commands, receives status, transfers data between attached SCSI devices and the adapter, and provides the following functions:

  • SCSI bus arbitration
  • Device selection and reselection
  • SCSI phase change detection
  • SCSI bus parity generation and checking

The SCSI bus interface can be implemented in two different ways:

Adapter Microprocessor

The adapter microprocessor controls all adapter operations. It translates commands received from the system into a series of operations. For example, the adapter microprocessor manages the disk cache, controls data transfers to and from the system, and executes all necessary error detection and recovery procedures to ensure data integrity.

Two different microprocessor types are used:

  • 16-bit adapters w/o cache: Intel 8032/80C32 or compatible
  • 32-bit adapters w/ cache: Intel 80C188 or compatible (10 or 16 MHz)

Adapter BIOS and POST

The adapter read-only memory (ROM) contains BIOS, advanced BIOS (ABIOS), and power-on self test (POST) for fixed disk drives. Additional BIOS routines are provided to support device drivers for SCSI devices other than fixed disk. POST routines verify the SCSI subsystem configuration at power-on and after any system reset.


Implementations

NameFormSCSI Bus Ctrl.MCUCache RAM
16-bit SCSI w/o Cache (all 33F6715 + 33F6910)
SCSI /Along MCAAIC-6250 + 15F79178032AHnone
SCSI A/16 (SIP)half MCAAIC-6250 + 15F79178032AHnone
SCSI A/16 (DIP)half MCA84F832480C32GBAAnone
SCSI/A (hdr)2/3 MCAAIC-6250 + 15F79178032AHnone
8573 P75planarAIC-6250 + 15F791780C32-1none
32-bit SCSI w/ Cache (all 33F6715 + 15F6903)
SCSI w/ Cache (old)long MCAAIC-6250 + 15F791780C188-102x 30-pin SIMM
SCSI w/ Cache (new)long MCA84F832480C188-162x 30-pin SIMM
SCSI A/32 (SIP)half MCA84F832480C188-164x 256Kx4, 2x 256Kx1
SCSI A/32 (DIP)half MCA84F832480C188XL-2016x 256Kx42
SCSI w/ Cache (hdr)2/3 MCAAIC-6250 + 15F791780C188-164x 256Kx4, 2x 256Kx1
SCSI A/32 w/ HDDlong MCA84F832480C188-166x 256Kx42
7568 DASDmoduleAIC-6250 + 15F791780C1882x 30-pin SIMM
76/77 Bermudaplanar84F832480C188-161x 256Kx18
9585 "X"planar84F832480C188-161x 256Kx18
5551-N/Yplanar84F832480C188XL1x 256Kx18

Notes:

  1. The 80C188 device used on some adapters is rated for 20 MHz operation but the actual clock appears to be still only 32 MHz / 2 = 16 MHz.
  2. Two of the six 256Kx4 devices are possibly used as 256Kx1 parity storage.

Sources

Content created and/or collected by:
Louis F. Ohland, Peter H. Wendt, David L. Beem, William R. Walsh, Tatsuo Sunagawa, Tomáš Slavotínek, Jim Shorney, Tim N. Clarke, Kevin Bowling, and many others.

Ardent Tool of Capitalism is maintained by Tomáš Slavotínek.
Last update: 29 Mar 2024 - Changelog | About | Legal & Contact