Content created by Tam Thi Pham (MAD Max). Edited by Major Tom.
IBM PS/2 machines make use of several different types of memory that are
proprietary from the rest of the industry. Here's a brief primer on the
different memory technologies that PS/2's employ.
Three different memory technologies are used on PS/2 machines:
- Standard Parity Memory
- Error Correcting Code - Parity Memory
- Error Checking and Correcting Memory
Standard Parity Memory
Standard parity memory support is implemented on all PS/2s. The standard
however, is IBM's own. This type of memory has 32 bits of data and 4 bits of
parity information. The 4 bits of parity are able to identify when an error has
occurred but do not have enough information to locate it so the system is
halted on error. This type of memory will fail to detect double-bit errors.
Error Correcting Code - Parity (ECC-P) Memory
Machines such as IBM's Server 85 are able to use standard parity memory to
implement what IBM calls ECC-P. Here, the correction procedure is a function of
the memory controller and firmware, with the feature being enabled via the
system reference diskette.
To enable the correction of single-bit errors IBM developed an algorithm
which scans the data stored in memory. The algorithm generates a unique 7-bit
pattern for 32 bits of information, an 8-bit pattern for 64 bits of
information, and so on. When ECC-P is enabled the controller reads/writes two
32-bit words and 8 bits of check information using standard parity memory, thus
being able to get a 64-bit word with 8 bits of correction information. This
gives the ability to correct single-bit errors as well as the capability to
detect double-bit errors. Effectively, this provides equivalent functionality
to ECC memory via use of parity SIMMs.
Error Correcting Code (ECC) Memory
Certain model PS/2s have ECC circuitry support and give protection against
memory parity errors. ECC SIMMs differ from standard parity memory SIMMs in
that they have additional storage space to hold check information on the bytes
of information stored. When data is stored in memory, the data is scanned using
an algorithm developed by IBM. The scan generates a unique 7-bit pattern
representing the data stored and this is stored in the 7-bit check space.
If a single bit has changed (the most common type of memory failure) the
scan will always detect it, automatically correct it, and record its occurrence
without incident to to operation of the machine. The scan will also be able to
detect all double-bit errors, which occur much less frequently. With double-bit
errors however, the ECC unit will only be able to detect and record it.
General Usage Guideline
Machines using parity memory (standard parity or ECC-P) do not require that
the memory be installed in matched pairs. Due to IBM's support for memory
interleaving though, better system performance will be realized if the SIMMs
are installed in pairs.
Machines using ECC memory require that the memory installed in matched
pairs. Additionally, simultaneous use of different memory technologies (i.e.
ECC and ECC-P) is not allowed.