rfpcimca.exe 320 / 520 Reference Diskette v2.07 (zipped image)
rdpcimca.exe 320 / 520 Micro Channel Diagnostic Disk v5.30 (zipped image)
33l3917.exe 320 / 520 Micro Channel BIOS Flash Update Disk v29A (readme) (zipped image)
m30h2591.exe 320 and 520 OS/2 Video Support Disk v1.23
m30h2594.exe 320 / 520 Windows and Utilities Video Support v1.23 (1/2)
m30h2597.exe 320 / 520 Windows and Utilities Video Support v1.23 (2/2)
mcantsmp.exe 320 / 520 NT SMP Support Diskette for MC v1.0 (readme)
m84h4257.exe 320 / 520 NT Spt Disk for Cirrus Logic 5436 Video v1.01
Specifications
Level E Planar
Planar Variants and CPU Speeds
Locating CPU Jumpers
CPU Speed Settings
Memory Riser
Specifications
Intel Neptune 430NX chipset, PCI 2.0 (2 slots)
Memory
16/256 MB (std/max), 70 ns 72-pin SIMMs w/ gold contacts
Supports 4, 8, 16, 32 MB industry-standard parity or EoS (ECC-on-SIMM) SIMMs
All memory must be installed in matched pairs due to 64 bit path to memory
All memory addressable by DMA
Cache
256/512 KB shared L2 cache w/ full SMP support
Asynchronous, write-back, directly mapped; 15 ns
Level E Planar FRU P/N 96G3694 (no J1)
BT1 CR2032 battery holder
HT1 Voltage regulator
J2 SCSI LED connector (yellow/white)
J3 IDE HD LED connector (red/white)
J4 Front fan connector (black/red)
J5 L2 cache slot (COAST?)
J6 Speaker connector
J8 Primary CPU fan connector
J9 Secondary CPU fan connector
J10 Power LED connector (green/white)
J12 Clock multiplier
J13 IDE connector pads
J14 Memory card slot
J15 Password write
J16 C2 cover open
J17 C2 keylock
J19 Parallel port header
J20 Floppy header
J21 Serial B header
J23 Power connector pads
J24 Serial A header
J25 Reset switch header
J26 SCSI Select
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J27 Video Select
J28 SCSI standard connector
J29-34 32-bit MCA slot
J35 SCSI F/W connector
J36,37 32-bit PCI slot
J38 Power connector
J39 External SCSI F/W connector
J40 Video connector
J41 Keyboard port
J42 Mouse port
J43 CPU clock speed
U1 Primary CPU socket
U13 S82434NX PCI/cache/memory ctrl. (PCMC)
U25,38 S82433NX Local bus accelerator (LBX)
U27 06H3669 (OKI M33S0570-33)
U28 Secondary CPU socket
U29 06H6119 (TI CF64569BPPM)
U31 Flash BIOS
U55 CL-GD5430-QC-D VGA GUI accelerator
U57 06H5685
U59 I/O Controller?
U65 AIC-7870P SCSI-2 PCI bus master
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The EPRM has the pinout and use for the various settings.
J12 - CPU Clock Multiplier
Setting | J12 |
2x | 1-2 |
1.5x | open |
J15 - Password Write
Setting | J15 |
Disable | 1-2 |
Enable | 2-3 |
J26 - SCSI Select
Setting | J26 |
System Board | 1-2 (default) |
Installed Adapter | 2-3 |
J27 - Video Select
Setting | J27 |
System Board | 1-2 (default) |
Installed Adapter | 2-3 |
J43 - FSB Clock
Setting | J43 |
50 MHz | 3-4, 5-6 |
60 MHz | 1-2, 5-6 |
66 MHz | 1-2, 3-4 |
Planar Variants and CPU Speeds
For the PC Server 320 MCA systems, there are two planar FRUs:
- FRU P/N 96G1340 supports 75 and 90 MHz only.
- FRU P/N 96G3694 supports 75, 90, 100, and 133 MHz.
For the PC Server 520 MCA systems, there is one planar FRU:
- FRU P/N 96G2648 supports 75, 90, 100, and 133 MHz.
In addition there are two versions of 96G3694 and 96G2648:
- Original planar (Level D & E): No J1, J12 (2-pin), J43 (6-pin).
- New planar (Level G): J1 (3-pin), J12 (3-pin), J43 (6-pin).
On the new planar (Level G), a new jumper J1 (3-pin) was added AND J12 was
changed from a 2-pin to a 3-pin jumper. Jumpers J1, J12 and J43 control the
processor speed.
Locating CPU Jumpers
J1 (new planar) is located to the left of the processor and J12.
J12 is located to the left of the processor.
J43 is located a little less than halfway down the system board beneath the
processors. It has three double jumpers (6-pins) corresponding to each
oscillator located right beneath the processors. The three oscillators from
left to right are 50, 60, and 66 MHz. When you jumper the pins, you are
grounding its corresponding oscillator thus disabling it.
The earlier Level D and E planar had a J43 consisting of 2x3 pins and J12 of
2 pins. The Level G planar had a J43 with 2x3 pins, J12 with 3 pins and J1 with
3 pins.
Level D and E Planar
1 ° ° 2
3 ° ° 4
5 ° ° 6
(J43) 1 °
2 °
(J12)
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Level G Planar
1 ° ° 2
3 ° ° 4
5 ° ° 6
(J43) 1 ° 1 °
2 ° 2 °
3 ° 3 °
(J1) (J12)
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The diagram above indicate the pin orientation and numbering scheme with
respect to the edge of the planar. Refer to the diagram on the system frame or
door for additional information.
CPU Speed Settings
|
Original Levels |
Level D |
Level E |
Level G |
FRU P/N |
96G1340 (320) N/A 96G2648 (520) |
N/A 96G3694 (320) 96G2648 (520) |
N/A 96G3694 (320) 96G2648 (520) |
Processor |
Jumper |
J12 2-pin |
J43 6-pin |
J12 2-pin |
J43 6-pin |
J1 3-pin |
J12 3-pin |
J43 6-pin |
50/75 MHz |
open |
3-4, 5-6 |
open |
3-4, 5-6 |
1-2 |
1-2 |
3-4, 5-6 |
60/90 MHz |
open |
1-2, 5-6 |
open |
1-2, 5-6 |
1-2 |
1-2 |
1-2, 5-6 |
(320 only) |
66/100 MHz |
open |
1-2, 3-4 |
open |
1-2, 3-4 |
1-2 |
1-2 |
1-2, 3-4 |
(520 only) |
66/133 MHz |
Not Supported |
1-2 |
1-2, 3-4 |
1-2 |
2-3 |
1-2, 3-4 |
You can run the MYT planar with CPU clocks up to 120 MHz (60 MHz x 2.0),
AFAIK. If you set J43 to 66 MHz, then the system won't boot. You need the MDx
or MZx planar to run at 66 MHz.
Memory Riser FRU P/N 96G3692, assy P/N 96G3659, PCB P/N 96G3656
J1-8 72-pin SIMM socket
No active components on the riser aside from two
74ABT244 buffers. No components on the
solder side.
Memory must be installed in pairs — J8 & J7, J6 & J5,
J4 & J3, J2 & J1.
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