Source: InfoWorld, Volume 9, Issue 38, 21 Sep 1987
Author: Michael J. Miller and Alice LaPlante
In an exclusive interview, Chet Heath, the chief designer of IBM's Micro
Channel Architecture gave InfoWorld a close look at the new bus design,
detailing what it means for PC users. Heath was interviewed by InfoWorld
following a technical seminar he gave on the MCA at PC Expo.
IBM's Micro Channel Architecture is a versatile and complex design whose
capabilities will become clear only through a long-term education process,
according to Heath.
"The complexity of the Micro Channel is such that it makes educating the
industry a difficult job," said Heath, who has been traveling around the world
over the past months, giving lectures and seminars on the capabilities of the
new architecture. "It's like future shock - it's going to be a gradual
education process."
Some benefits of the Micro Channel - such as requiring smaller add-in boards
as well as allowing switchless installation of those boards - are obvious, said
Heath. Other features are more subtle, such as the lower electromagnetic
interference generated by the bus and the fact that boards designed for the MCA
will be more reliable and problems easier to diagnose and repair.
Some capabilities of the new design have yet to be exploited, said Heath.
For example, the MCA can support up to eight "master" microprocessor chips -
chips that directly control access to the machine's memory. This could
ultimately lead to fault-tolerant systems or computers that run multiple
processors.
Finally, the bus was intentionally designed with plenty of room for growth:
a significant number of features have been "reserved" for this purpose, and
Heath says that even IBM cannot predict how those resources will be used. "The
MCA architecture merely shapes the boundaries of what is possible," said Heath.
"It's the PC industry that is going to determine how it is used."
Why Chance The Design?
Contrary to industry speculation. IBM did not deliberately change the bus
structure to ensure a proprietary PC design, Heath said. Instead, work on the
MCA began in 1983, prompted by problems IBM engineers were having with
electromagnetic compatibility (EMC) on its original PC line. IBM also wanted to
respond to customer requests for a "switchless" setup of add-in boards and the
capability to use more advanced processors.
"We could have shoe-horned a 386 chip into a 286 box without any trouble,"
said Heath. "This would have provided users with increased performance and
would have been a generally OK solution."
At first, the main impetus to change the bus design was an FTC requirement
that manufacturers meet certain EMC standards to prevent computers from
distorting radio and television reception. IBM's original PC XT had difficulty
meeting those standards.
"With the PC XT, we had to copperplate the chassis to make sure that
electrical currents returned to the power supply," said Heath. "Then, it still
wasn't good enough, so we had to nickel plate it - a very expensive process. We
finally got it working, but we spent a lot of money on it and didn't get any
increased functionality for our customers."
So meeting FCC requirements was a top priority, said Heath.
IBM also began working on a new bus design because users complained about
the difficulties of installing add-in boards due to the plethora of DIP
switches on those boards. "No one liked the switches - it took close to an hour
just to set a system up," said Heath, 'in addition, switches are the No. 1
cause of 'no problem found' diagnoses on service calls - and someone had to cut
those costs, either the user or the dealer. So we decided that the switches had
to go."
In addition. IBM needed changes in the bus to accommodate advanced
processors - such as the 32-bit 80386 CPU - and also wanted to be able to
perform true multitasking.
According to Heath, one of the more difficult decisions was to change the
size of the bus - the decision that would render existing add-in boards
obsolete.
"What may seem obvious now is the result of a lot of soul searching," said
Heath. "But once we made the decision to change the physical format, the door
was wide open to improve everything."
Priorities
The next stage for IBM was to compile a list of priorities that would
determine what features actually got implemented in the new design:
- Safety
- Data Integrity
- System Integrity
- Reliability
- Compatibility
- Functionality
- Performance
- Cost
Heath acknowledged that to the PC industry, the surprising aspect of this
list is the relatively low priority assigned to functionality and performance
when compared to such things as data and system integrity and
compatibility.
"Performance is important, but not as important as other things," said
Heath, who said that IBM was searching for balanced performance that would best
suit its customers. "For example, we put a very high priority on data integrity
- even listing it higher than system integrity," he said.
"The reason? For most people, the value of the data stored in a computer far
exceeds the value of the hardware itself."
Heath said that the decision to switch to 3 1/2-inch floppy disk drive media
from 5 1/4 -inch formal aptly illustrates the use of this prioritized list.
"First, the 3 1/2-inch media is much more reliable, which fits item No. 2 on
the list," said Heath. "Since data integrity was more important than
compatibility, which was more important than cost, you can see how we made that
decision."
Compatibility also came before performance and functionality, said Heath,
who said that if IBM hadn't had to worry about compatibility with the existing
software base, it could have been much more innovative and thus increased
performance in "creative" ways.
"The compatibility issue meant that we didn't have the option of being truly
creative," said Heath. "Instead, we had to get away with being
clever."
Physical Layout
The physical layout of the MCA as released in the PS/2 Models 50, 60, and 80
includes three different types of physical connections to add-in cards. These
include:
- A 16-bit connector
- A 16-bit connector with a special video connector
- A 32-bit connector
All connectors are considerably more sophisticated than those on the
"classic" PC bus, said Heath.
One example is that boards designed specifically for the MCA will haw faster
input and output for tasks such as controlling ports or disk drives (see
sidebar below).
In addition, the architecture was designed to accommodate surface-mount
technology and very large scale integration (VLSI). Besides being cheaper, this
means that add-in boards designed for the MCA are considerably smaller than PC
AT boards.
The smaller size also helps IBM meet ergonomic requirements in European
countries, which require the center of the monitor be less than approximately
10 1/2 inches above the desktop.
Easy Installation
One of the most obvious differences is a feature called "Programmable Option
Select," which means that users won't have to worry about setting DIP switches
when installing add-in hoards. Instead, the Micro Channel essentially replaces
switches on add-in boards and on the main system board with a set of memory
registers on each card that contains setup information.
The switchless installation has many advantages. It saves installation time
and makes it easier to install add-in products.
In addition, boards can be easily and automatically reinitialized to prevent
conflicts, making it easier to put in multiple identical boards. All told, with
an optional extension protocol, the special registers allow users to get more
than 128,000 switch possibilities.
A side benefit is that now the machine "knows" which cards are inside of it,
making diagnosing problems simpler.
Each add-in board designed for the MCA card has its own unique
identification number and comes with a disk containing an .Adapter Definition
File (.ADF), a text file that describes which resources each plug-in board
requires in order to function.
Whenever a user installs a new board, the information on the ADF is stored
in nonvolatile RAM on the main system board: this set-up information is then
sent to the appropriate add-in board when the machine is turned on. From that
time on, the system knows exactly which boards are installed, which greatly
simplifies reconfiguring the machine and diagnosing trouble because of
the identification number.
The bus also allows users to create a "restore" file on disk, which
duplicates the information in the setup RAM. This way you could set up your
system easily in case you remove the system battery or it fails.
Alternatively, users could completely configure and set up one
microcomputer, then insert the boards and use the restore file to ensure that
all machines have exactly the same setup - something that's difficult to do on
current AT-type machines, considering the multiple DIP switches on most add-in
boards.
One crucial element is that each type of board should have its own
identification number. In the basic plan, 32.000 such numbers were reserved for
IBM, and 32,000 were reserved for independent developers. IBM has acknowledged
that developers have had trouble getting through to register their numbers, but
said that such problems have been solved.
Basic Workings
The MCA was designed to be completely processor independent, relying instead
on a default timing cycle of 200 nanoseconds, with extendable cycles for
synchronous or asynchronous operations.
Heath emphasized that any processor could be used in the MCA - even
non-Intel chips such as Motorola's 68000 family used in the Macintosh and Sun
and Apollo workstations.
"Just about any processor will run on this bus - including non-Intel family
processors," said Heath. "It is completely processor-independent."
The MCA also includes a special protocol for fast system memory, which
allows the use of faster 80-nanosecond, zero-wail-state memory chips in the
Model 80.
One major distinction of the Micro Channel is in the way it recognizes and
handles interrupts - the signals sent by add-in boards to the central
processor.
Both the IBM PC and PC AT use an "edge-triggered" interrupt scheme, meaning
that any peripheral that wants to send an interrupt merely has to change the
signal level from low to high at the beginning of the interrupt, Heath said.
In contrast, the Micro Channel uses "level-sensitive" interrupts, meaning
that boards will hold the line active throughout the interrupt process. In
addition, some interrupts have higher priority than others. This means that
multiple interrupts can be active at the same time, with the system
prioritizing and deciding which to operate on.
This makes it easier for add-in cards to share logic with the main system
board, and it reduces the possibility of a signal getting lost or of a spurious
signal (caused by a faulty board or by outside electronic interference)
accidentally causing a problem.
Another, more immediate advantage of having interrupts with different
priorities is that the number of communications ports has multiplied. The PC AT
was designed to accommodate at most two such ports; the PS/2 can accommodate up
to eight.
Multiple Device Arbitration
The prioritized bus arbitration mechanism on the Micro Channel allows
multiple Masters, devices like processors that control their own memory
independent of the main system memory. These could be input/output subsystems,
graphics coprocessors, or even other central processing units.
The current implementation of the Micro Channel allows for up to eight
Masters, in addition to the Direct Memory Address (DMA) "slaves," or devices
that do not control their own access to memory, but instead rely on a DMA
controller chip.
Printers and communications devices are usually interrupt driven, but would
be more effectively used as Masters, Heath said. This could lead to concurrent
processing - or, more likely, intelligent subsystems, such as an intelligent
disk controller or communications board, perhaps with built-in caching or file
encryption.
Assigning these peripherals Master status means that the main system board
can act as an "executive," controlling the activities of other processors being
used on the system.
Since the MCA allows a number of different devices attached to the system,
each working independently, it also needed a way of prioritizing the interrupts
from all of these devices - in other words, deciding which requests for bus
access are the most important and deserve to be processed first. In MCA jargon
this is called arbitration.
Through arbitration, the Micro Channel looks at which DMA devices have
requested interrupts and gives the go-ahead to the device with the highest
priority.
As part of this scheme, interrupts only go into effect when they are
confirmed by both the MCA's hardware and controlling software.
The Micro Channel currently allows for 16 levels of arbitration between
devices on the bus. Eight of these levels are assigned to various DMA devices:
seven are "reserved" for future use; and the system board processor accounts
for the lowest level. In addition, the system board controls two higher levels
of arbitration for error conditions and memory refresh, which are not available
to devices on the bus. Two of the currently assigned DMA channels provide what
is called "virtual DMA," meaning they can be reassigned among various devices,
thus leaving open the possibility of extending the Master concept through many
different levels.
For example, such a hierarchical system might permit users to build an
"expansion box" containing up to 16 processors or linking to even more
expansion boxes. However, Heath said this would require very sophisticated
control throughout the system.
Although most devices can accomplish a "transaction" in the single memory
cycle granted to them when their turn comes up in arbitration, some devices
require multiple cycles to transfer blocks of data. For these, the MCA includes
a feature called "burst mode," which allows a device to use multiple
cycles.
For example, burst mode allows a disk controller enough time to access
multiple disk sectors in one pass, allowing for a 1:1 interface on the disk
drives. Combined with the built-in caching scheme, this allowed IBM to use
slower hard disk drives without losing speed. In addition, IBM claims that the
slower drives are ultimately more reliable and longer-lived than the faster
drives.
To manage all this, and to ensure that all devices can get access in a
timely fashion, the Micro Channel uses a "fairness" algorithm. The allows
devices to use the burst mode, but makes them wait after they get their turn
until all other devices have had a shot, regardless of priority.
Fairness and arbitration will be particularly important in moving toward a
multitasking, multiprocessing environment in the future, said Heath. The
current PC AT architecture allows for an alternate Master but has no burst mode
and no fairness algorithm, according to Heath.
Tomorrow's systems could allow up to 16 processors with the ability to
arbitrate, hut to do this you will need an operating system that supports
"multiple threads" - in other words, multiple operations continuing at the same
time. OS/2 will be one of the first operating systems for microcomputers that
allows this.
Reliability
Heath said that several Micro Channel features should make systems based on
it more reliable. The number of signals in and out of chips is reduced, thus
aiding LSI design.
For example, one issue that often crops up in the IBM PC or PC AT
architecture involves how systems react if they receive extra interrupts from a
device, due either to a bad board or extraneous electromagnetic interference.
Heath said that the MCA has resolved that issue. Unlike the old bus, the Micro
Channel can check the state of a board at any time and get a positive
acknowledgment of which board sent a given signal. If a board is producing bad
signals, the Micro Channel can detect this and report the error.
Similarly, the Micro Channel should be able to detect and then map out a bad
sector of memory, allowing you to continue computing even if you have a bad
memory chip.
All these features should make it easier to run diagnostics on machines
based on the Micro Channel, according to Heath, who cited this as a major
reason IBM was able to drastically reduce its maintenance contracts for the
PS/2 as compared to similar contracts for the PC AT.
"Obviously, the best of all possible worlds is that problems don't occur,"
said Heath. "But the next best thing to that is being able to pinpoint exactly
what went wrong."
Possible Implementations
The Micro Channel Architecture makes possible innumerable variations on
existing PS/2 hardware, according to Heath.
"Users are going to build things on their computers that you wouldn't have
dreamed could be done on a PC," said Heath.
For example, by using a "sleep" signal, users could design a system that
contains two identical add-in boards, each working independently. Then, if one
board failed for some reason, the system could put it to "sleep" and let the
other board continue working. This would allow for fault-tolerant computer
operations.
Another option would be to put into a computer multiple concurrent
processors, each working simultaneously. For instance, you might be able to put
a number of plug-in boards, each containing 186 chips plus their own memory,
into a Micro Channel. Even paying as high a price as $2,000 per plug-in board,
users could get a nearly a 1 MIPS/$1,000 ratio, a vast improvement over
today's average .25 MIPS/$1,000, Heath said.
Room for Growth
Above all. Heath emphasized, the Micro Channel gives the PC industry room to
grow in.
"Just in case IBM didn't think of every thing - and we know we didn't - we
kept a lot of the potential in reserve," said Heath. "We're waiting to see what
ideas the industry can give us with the 16-bit and 32-bit implementation of the
Micro Channel."
In 1983, when work on the MCA bus began, Heath said. IBM didn't have the
answers, but only knew the problems and limitations of the old architecture -
an architecture that technically left IBM no room to grow in.
"Having the knowledge that a solution is required and having the solution
itself are two very different things," said Heath. "But never again will we
make the same mistake of not allowing ample room for technical growth."
With the Micro Channel. IBM hopes to have an architecture that is applicable
not only to the PS/2, but to future generations of machines as well.
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