Processor Complex Pinout

   The Processor Complex interface (also known as "Processor Interface Connection") consists of Micro Channel signals (some of which are shared with the planar I/O bus), memory signals, control signals, power supply lines, and some other connections.

   The physical interface consists of two identical connectors. The connector type used here is an unique variant of the Micro Channel connector with 2x40 + 2x42 pins (164 usable pin positions, or 168 positions - including pin positions taken by the physical key). This gives us 328 usable pins total for both connectors. The connectors are placed in-line with no gap in between, touching each other by the shorter 2x40-pin section.

The interface is common to both the Model 90 and Model 95 (Server 500) planar boards.

Pinouts:
   Connector 1 (Rear)
   Connector 2 (Front)

Signal Descriptions:
   Introduction
   Power
   Micro Channel Signals
   Memory Signals
   Other Signals

The pinout map (oof, 328 pins!) and all drawings made by Tomas Slavotinek.


Notes

The "component side" (A) and "solder side" (B) refers to an installed processor card.

The "Rear" arrow points towards the back side of the planar/system unit.


Connector 1 (Rear)

Micro Channel (and planar I/O) bus connections + some memory signals.
Some signals still unknown.

Side B (solder)Pin #Side A (component)
MA AB 0001MA AB 01
MA AB 0202MA AB 03
GND03MA AB 04
MA AB 0504MA AB 06
MA AB 0705+5 Vdc
MA AB 0806MA AB 09
-DPAREN07RAS A4 1/3
DPAR(0)08RAS A4 0/2
GND09RAS A3 1/3
DPAR(1)10+5 Vdc
DPAR(2)11RAS A3 0/2
Unknown12-RESET
Unknown13Unknown
-CD DS 1614CD CHRDY
GND15-CD DS 32
14.3 MHz OSC16GND
GND17-CD SFDBK
MADE 2418A 23
A 1119A 22
A 1020A 21
A 0921+5 Vdc
GND22A 20
A 0823A 19
A 0724A 18
A 0625A 17
GND26WE AB
A 0527A 16
A 0428A 15
A 0329A 14
GND30+5 Vdc
A 0231A 13
A 0132A 12
A 0033-PREEMPT
GND34-BURST
-ADL35-CMD
-CHRDYRTN36GND
ARB 0037ARB 01
ARB 0238ARB 03
GND39ARB/-GNT
-TC40+5 Vdc
-S041-S1
M/-IO42D 00
PHYSICAL KEY43PHYSICAL KEY
PHYSICAL KEY44PHYSICAL KEY
D 0145D 02
D 0346+5 Vdc
GND47D 04
D 0548D 06
D 0749D 08
D 0950GND
D 1051D 11
D 1252D 13
GND53D 14
D 1554-SDR(0)
-SDR(1)55-SD STROBE
-DS 16 RTN56+5 Vdc
-REFRESH57-SBHE
-CHCK58-MSDR
GND59DPAR(3)
D 1660+5 Vdc
D 1761D 18
D 1962D 20
D 2163D 22
D 2364GND
GND65D 24
D 2566D 26
D 2767D 28
D 2968+5 Vdc
D 3069D 31
A 2470A 25
GND71A 26
A 2772A 28
A 2973A 30
A 3174+5 Vdc
-BE 075-BE 1
-BE 276-BE 3
GND77TR 32
WE BB78-DS 32 RTN
Unknown79-IRQ 05
INTR80+5 Vdc
Unknown81-MMC
-MMC CMD82Unknown
GND83MA AA 0
MA AA 184MA AA 2
Side B (solder)Pin #Side A (component)


Connector 2 (Front)

Almost exclusively memory signals.

Side B (solder)Pin #Side A (component)
MA AA 301MA AA 4
MA AA 502MA AA 6
GND03MA AA 7
MA AA 804MA AA 9
MA BB 005GND
MA BB 106MA BB 2
MA BB 307MA BB 4
GND08MA BB 5
MA BB 609MA BB 7
MA BB 810+5 Vdc
MA BB 911MA BA 0
MA BA 112MA BA 2
GND13MA BA 3
MA BA 414+5 Vdc
MA BA 515MA BA 6
MA BA 716MA BA 8
GND17MA BA 9
MD A 018+5 Vdc
MD A 119MD A 2
MD A 320MD A 4
GND21MD A 5
MD A 622MD A 7
MD A 823MD A 9
MD A 1024GND
MD A 1125MD A 12
MD A 1326MD A 14
GND27MD A 15
MD A 1628MD A 17
MD A 1829MD A 19
MD A 2030+5 Vdc
MD A 2131MD A 22
MD A 2332MD A 24
GND33MD A 25
MD A 2634MD A 27
MD A 2835MD A 29
MD A 3036GND
MD A 3137MDP A 0
MDP A 138MDP A 2
GND39MDP A 3
BS A 040+5 Vdc
PHYSICAL KEY41PHYSICAL KEY
PHYSICAL KEY42PHYSICAL KEY
BS A 143BS A 2
BS A 344WE AA
WE BA45RAS A1 2
RAS A1 346+5 Vdc
GND47RAS B1 0/2
RAS B1 1/348RAS A2 0/2
RAS A2 1/349RAS B2 0/2
RAS B2 1/350GND
CAS A 051CAS A 1
CAS A 252CAS A 3
GND53CAS B 0
CAS B 154CAS B 2
CAS B 355-CASP A
-CASP B56+5 Vdc
MD B 057MD B 1
MD B 258MD B 3
GND59MD B 4
MD B 560+5 Vdc
MD B 661MD B 7
MD B 862MD B 9
MD B 1063MD B 11
MD B 1264GND
GND65MD B 13
MD B 1466MD B 15
MD B 1667MD B 17
MD B 1868+5 Vdc
MD B 1969MD B 20
MD B 2170MD B 22
GND71MD B 23
MD B 2472MD B 25
MD B 2673MD B 27
MD B 2874GND
MD B 2975MD B 30
MD B 3176MDP B 0
GND77MDP B 1
MDP B 278MDP B 3
BS B 079BS B 1
BS B 280+5 Vdc
BS B 381ECC PD
RAS B3 0/282RAS B4 1/3
GND83RAS B4 0/2
MMCR RTN84RAS B3 1/3
Side B (solder)Pin #Side A (component)


Introduction

The Processor Complex interface consists of:

  • Micro Channel and planar I/O bus signals
  • Memory signals
  • Other signals

Throughout this document, a minus sign (-) in front of a signal name indicates that the signal is active when it is at a low-voltage level. When no minus sign appears, the signal is active when it is at a high-voltage level. For example, -CMD specifies the signal is active low. Also, ARB/-GNT is in the ARB state when it is at a high level and is in the -GNT state when it is at a low level.

All of the logic signal lines are transistor-transistor logic (TTL) compatible.


Power

The only voltage available on the Processor Complex interface is +5 V DC. Pins supplying this voltage are located on the A side of the connectors, together with some ground pins. A majority of the ground pins is then located on the B side.

Any other voltages are generated locally on the processor board, from the +5 V DC supply rail.


Micro Channel Signals

32-bit Micro Channel interface. All Micro Channel Signals are described HERE.

Note: Some of the channel data, address, and control signals are shared with the planar I/O bus. This bus interconnects all the on-planar features - external I/O ports, FDC, Op Panel interface, memory Presence Detect lines, etc.


Memory Signals

Two 32-bit interfaces (64-bit total) between the memory controller on the processor card and the memory SIMMs on the planar. The memory is organized as two independent memory banks - Bank A and Bank B. Each bank then consists of two SIMM pairs:

  • Pair A - SIMM slots 1 and 2
  • Pair B - SIMM slots 3 and 4

Some signals are unique to each SIMM slot, some are shared within the individual SIMM pairs, and some are shared by the entire bank.

MA bp xx: Memory Address Bit xx for Bank b Pair p

MD b xx: Memory Data Bit xx for Bank b

MDP b x: Memory Data Parity Bit x for Bank b

BS b x: Block Select x for Bank b

WE bp: Write Enable for Bank b Pair p

CAS b x: Column Address Strobe x for Bank b

-CASP b: Column Address Strobe Parity for Bank b

RAS bs x/y: Row Address Strobe x and y for Bank b Slot s

ECC PD: Error-Correcting Code Presence Detect: This signal is driven by the planar logic and it's the negative AND of -ECC PD from each SIMM connector (pin 48). If any of the SIMM slots is occupied by a ECC memory module, this signal is driven high. Low otherwise.


Other Signals

-RESET: -System Reset: This signal is driven by the planar logic.

INTR: Interrupt Request: This signal is driven by the planar interrupt controller and is connected to the INTR pin of the main processor.

MMCR RTN: Matched Memory Cycle Request Return: This signal is driven by the planar logic and it's the AND of -MMCR from each channel connector.


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