7007-N40 Planar

Top View

Most of the reference designators are covered by the component itself, thus I had to made up many of them.

C96 Memory backup Cap?
F1 PTC fuse
F2 PTC fuse
LK1 Speaker
LK2 Header for ?
OSC1 3.6864 MHz osc
OSC2 25.0000 MHz osc
SK1 Modem
SK3 DB15 ethernet (AUI)
SK4 Audio In/Out
SK5 Headphone
SK6 Serial
SK7 ??
SK8 KB/Mouse port
SK9 PS/2 Mouse
SK10 Video
SK11 Appleprint ?
SK13 DC Power plug
SK14 40 pin VMC
SK15 Dual PCMCIA slots
SK16,17 72 pin SIMMs
SW1 Switch for?
U1 AT&T T 7213
U2 AT&T T7259 DBRI
U4 ROS 1.21 2792
U5 Ramtron FM1608S-250SC 8Kx8 FRAM
U6 NCR NCR89C100
U7 EPROM "W/Wort Modem"
U8 VLSI VY27004-2 TS103-A
Y1 H20.000B3 xtal
Y2 H12.2960B4 xtal
Y3 H16.9344B4 
Y4 35.2512 xtal
Y5 H19.6608C4

U2 AT&T T7259 DBRI - Dual Basic Rate ISDN chip
U5 Ramtron FM1608S-250SC 8Kx8 FRAM - Ferroelectric Nonvolatile RAM. 10 years data retention.
U8 Tadpole TS103-A
SW1 "MW" from England, 19N502EB. Case closed microswitch.

Bottom View

F1 PTC fuse
F2 picofuse (rework?)
U1-8 MT42C8255DJ-8
U9 PPC601 FD66-1PQ
U10 VLSI VY27002-2
U11 Rockwell C2900-20
U12 Bt445KHF
U13 Benchmarq bq2001S
U14 NCR89C105-B
U15 Crystal CS4215-KL
U16 Rockwell RC144DPL

U10 Tadpole TS102-A PCMCIA Controller

SK14 40-pin SCSI Connector

It uses a 40-pin mini-centronics connector (like the IBM SCSI connectors). Nothing like this in PS/2 land. The planar has a male connector.

Removable Hard Drive SCSI Connector

Pin Signal Pin Signal
11 GND 31 GND
13 GND 33 GND
15 /SCSID(P) 35 GND
16 NC 36 SCSID(1)
17 NC 37 GND
19 GND 39 GND

NCR89C100 / NCR89C105

..used the Machio/Slavio chipset for SCSI (fast-narrow, 8 bit), Ethernet (10base-T or AUI), serial and parallel ports, controlling the Boot PROM and NVRAM/hostid chip, and a bunch of other stuff. Part numbers for these chips were STP2000QFP (Machio) STP2001QFP (Slavio), aka NCR89C100 / NCR89C105. Performance is for all intents and purposes identical on all systems using the chipset, as far as I have ever been able to tell. SCA connectors for the SS20 was purely a physical interface issue, and in no way utilized the 16-bit interface on the drives, as the bus and controllers were 8-bit.

Slow I/O Subsystem

The Slow I/O subsystem is managed by an NCR89C105 SLAVIO. The SLAVIO is an application specific integrated circuit (ASIC), designed as part of a two-chip set with the NCR89C100 MACIO, which provides two serial channels, keyboard and mouse ports, an interrupt controller and two counter-timers. The key features of the SLAVIO include:

  • Two synchronous/asynchronous serial ports (85C30 SCC compatible)
  • Keyboard/mouse ports (85C30 SCC sub-set)
  • Two programmable counter-timers (500 ns period)
  • Interrupt controller
  • 8-bit expansion bus (EBus) interface/controller for EPROM and 8-bit I/O devices
  • Internal 82077 style floppy disk controller
  • Miscellaneous I/O functions

Fast I/O Subsystem

The Fast I/O Subsystem includes the SCSI, parallel and network interfaces. These are controlled by the NCR89C105 MACIO. This device is a custom ASIC designed to be operated with the NCR89C100 SLAVIO as a two-chip set. The key features of the MACIO include:

  • 53C90 style SCSI controller (Emulex FAS100A compatible)
  • 7990 style Ethernet controller
  • Parallel port interface
  • Dual 64 byte FIFOs
  • IEEE-1496 SBus DMA controller

This section describes each of these features.

Ethernet Controller

The Ethernet controller provides a 10Mbit/sec networking interface. The design features an AT&T serial interface encoder to provide the standard AUI interface through a 26-way high density connector. An AUI cable and an Ethernet transceiver can be used to provide access to other physical Ethernet media, including Thick, Thin and Fiber-optic networks.

Note: The AUI interface is DC coupled, and any attachment units used with SPARCbook 3 must feature the network isolation function. Ethernet data transfers are supported with the MThe Ethernet interface on the SPARCbook is provided by an NCR92C990 integrated into the MACIO. This provides AUI connections via a 15-pin D-shell connector. The MACIO enhances Ethernet operations by providing DMA support.ACIO DMA function.

ISDN and 16-Bit Audio Controller

The ISDN and Audio interface consists of two major components: the AT&T T7259 Dual Basic Rate ISDN Controller; and the Crystal Semiconductor Corporation CS4215 Multimedia Audio CODEC.

The T7259 has the following major features:

  • Simultaneous terminal endpoint (TE) and network termination (NT)
  • CCITT I.430/ANSI T1.605 support for 4 wire ISDN 2B+D basic access at the S/T reference point
  • Multiframing support: S&Q channel operation
  • Automatic synchronization of ISDN interfaces
  • On-chip HDLC formatter
  • On-chip 16-channel DMA address generator and linked list buffer manager
  • Supports AT&T Concentration Highway Interface (CHI)
  • Sbus master and slave interface

The ISDN controller combines a DMAC and data format converter (Parallel/Serial, Serial/Parallel and Time-Division-Multiplex). It has a number of DMA channels that can be allocated to support the ISDN or audio functions. The DMACs provide linked-list command support, and FIFOs allow burst data transfers to be performed on the Sbus. Large amounts of ISDN or audio information can be moved to and from the Sbus with a minimum of processor overhead. The data is formatted by the ISDN controller into a composite digital serial stream (the Concentration Highway Interface). This connects to additional on-chip ISDN support circuitry, and to the external audio CODEC. The ISDN interface is implemented as a 2B+D Terminal Endpoint. The Concentration Highway Interface of the ISDN circuitry provides a variety of different serial digital framing standards and data rates to the Audio CODEC. This supports a majority of the world standard Digital Audio formats. Typical configurations include high-quality stereo 16-bit 44.1 KHz (CD), and telephony quality mono 8-bit 8 KHz (ISDN).

The CS4215 Audio CODEC has the following major features:

  • Stereo analog-to-digital and digital-to-analog conversion
  • 4 KHz to 48 KHz sample rates
  • 16-bit linear and 8-bit u-law or A-law coding
  • Serial digital interface, compatible with AT&T CHI Concentration Highway Interface
  • Microphone and line analog outputs

Baud Rate Clocks

A 19.66 MHz clock (Y5) signal generated by the MACIO is used to derive a baud rate clock for all of the SCCs. This is divided by four before being fed to the SCCs at 4.915 MHz. The baud rate can be changed by loading different time constants (which can be different for each channel) into the time constant register. The clocking modes 1, 2, 16, 32 and 64 are supported.

SCSI Controller

The MACIO incorporates an enhanced NCR53C90 Fast SCSI Controller (FSC), which supports SCSI-2 operations at up to 10 Mbytes/sec running synchronously. SCSI transfers are supported by the MACIO's integral DMA controller.

Content created and/or collected by:
Louis F. Ohland, Peter H. Wendt, David L. Beem, William R. Walsh, Tatsuo Sunagawa, Tomáš Slavotínek, Jim Shorney, Tim N. Clarke, Kevin Bowling, and many others.

Ardent Tool of Capitalism is maintained by Tomáš Slavotínek.
Last update: 08 May 2024 - Changelog | About | Legal & Contact